Ultra-high speed CameraLink image transmission based on FPGA

	Ultra-high speed CameraLink image transmission based on FPGA
	Sui, Y.-L.; B. He; L.-G. Zhang; W.-H. Wang and J.-N. Chen
	2017
发表期刊	Jilin Daxue Xuebao (Gongxueban)/Journal of Jilin University (Engineering and Technology Edition)
卷号	47 期号:5
摘要	Based on Field Programmable Gate Array (FPGA), two sets of CameraLink interface transfer hardware platform are designed to compare serial-parallel converter chip and CameraLink interface based on FPGA). A new method, in which on-chip debugging tool Chipscope is combined with synchronized generation module, is proposed to detect error data accurately. The results show that CameraLink interface based on FPGA uses fewer pins with higher speed transmission rates. Single port supports a maximum transfer rate of 4.31 Gbit/s when the pixel clock is 154 MHz. The CameraLink data output can drive 6 m CameraLink transmission line, with no bit error appears for long hours, and it can be used in a variety of different systems based on CameraLink interface. 2017, Editorial Board of Jilin University. All right reserved.
收录类别	ei
语种	中文
文献类型	期刊论文
条目标识符	http://ir.ciomp.ac.cn/handle/181722/59199
专题	中科院长春光机所知识产出
推荐引用方式 GB/T 7714	Sui, Y.-L.,B. He,L.-G. Zhang,et al. Ultra-high speed CameraLink image transmission based on FPGA[J]. Jilin Daxue Xuebao (Gongxueban)/Journal of Jilin University (Engineering and Technology Edition),2017,47(5).
APA	Sui, Y.-L.,B. He,L.-G. Zhang,&W.-H. Wang and J.-N. Chen.(2017).Ultra-high speed CameraLink image transmission based on FPGA.Jilin Daxue Xuebao (Gongxueban)/Journal of Jilin University (Engineering and Technology Edition),47(5).
MLA	Sui, Y.-L.,et al."Ultra-high speed CameraLink image transmission based on FPGA".Jilin Daxue Xuebao (Gongxueban)/Journal of Jilin University (Engineering and Technology Edition) 47.5(2017).

条目包含的文件		下载所有文件
文件名称/大小	文献类型	版本类型	开放类型	使用许可
Ultra high speed.pdf（3072KB）	期刊论文	作者接受稿	开放获取	CC BY-NC-SA	浏览下载